- Circuit theory
- MOSFET transistors

It is a circuit that outputs the square value of the input current. It is used has a building block for analog multipliers, rectifiers, etc. There are many ways of designing a current squarer, but all are based on the square-law relation between drain current and gate-source voltage for transistors in strong inversion.

The 3 transistor current squarer is a very compact way of squaring a current.

The square-law for transistors $M_1$ and $M_2$ is $$I_1 = \beta(V_1 - V_{TH})^2$$ $$I_2 = \beta(V_2 - V_1 - V_{TH})^2$$ where $\beta=1/2\mu_nC_{ox}W/L$. First, let's work $I_2$ a little bit $$I_2 = \beta( (V_2 -2V_{TH}) - (V_1 - V_{TH}))^2$$ $$I_2 = \beta\left( (V_2 -2V_{TH})^2 - 2(V_2 -2V_{TH})(V_1 - V_{TH}) + (V_1 - V_{TH})^2 \right)$$ $$I_2 = \beta\left( (V_2 -2V_{TH})^2 - 2(V_2 -2V_{TH})(V_1 - V_{TH}) + \frac{I_1}{\beta}\right)$$ $$\frac{I_2}{\beta} = (V_2 -2V_{TH})^2 - 2(V_2 -2V_{TH})(V_1 - V_{TH}) + \frac{I_1}{\beta}$$ $$V_1 - V_{TH} = \frac{(V_2 -2V_{TH})^2 + \frac{I_1}{\beta} - \frac{I_2}{\beta}}{2(V_2 -2V_{TH})}.$$ Now we place the expression above in $I_1$: $$\begin{equation}I_1 = \beta \left(\frac{(V_2 -2V_{TH})^2 + \frac{I_1}{\beta} - \frac{I_2}{\beta}}{2(V_2 -2V_{TH})}\right)^2\label{eq:eq1}\end{equation}$$ Looking at the circuit above and noting that $I_1 = I_3$, we see that: $$I_{out} = I_1 + I_2$$ $$I_{in} = I_1 - I_2$$ Turning the variables around, we get: $$I_1 = \frac{I_{out} + I_{in}}{2}$$ $$I_2 = \frac{I_{out} - I_{in}}{2}$$ Replacing $I_1$ and $I_2$ in $\eqref{eq:eq1}$, we get: $$ \frac{I_{out} + I_{in}}{2} = \beta\left(\frac{(V_2 -2V_{TH})^2 + \frac{I_{out} + I_{in}}{2\beta} - \frac{I_{out} - I_{in}}{2\beta}}{2(V_2 -2V_{TH})}\right)^2$$ $$ \frac{I_{out} + I_{in}}{2} = \beta\left(\frac{(V_2 -2V_{TH})^2 + \frac{I_{in}}{\beta}}{2(V_2 -2V_{TH})}\right)^2$$ $$ \frac{I_{out} + I_{in}}{2} = \beta\left(\frac{V_2 -2V_{TH}}{2} + \frac{ I_{in}}{2\beta(V_2 -2V_{TH})}\right)^2$$ $$ I_{out} + I_{in} = 2\beta\left(\frac{(V_2 -2V_{TH})^2}{4} + \frac{I_{in}}{2\beta} + \frac{I_{in}^2}{4\beta^2(V_2 -2V_{TH})^2}\right)$$ $$ I_{out} = 2\beta\left(\frac{(V_2 -2V_{TH})^2}{4} + \frac{I_{in}^2}{4\beta^2(V_2 -2V_{TH})^2}\right)$$ $$ I_{out} = \beta\left(\frac{(V_2 -2V_{TH})^2}{2} + \frac{I_{in}^2}{2\beta^2(V_2 -2V_{TH})^2}\right)$$ By defining a current $I_b = \beta(\frac{V_2}{2} - V_{TH})^2$ , we get: $$ I_{out} = 2I_b + \frac{I_{in}^2}{8I_b}$$ The output current $I_{out}$ has a constant term (only depends on $V_2$) and a term that depends on the square of the input current $I_{in}$.

When the input current reaches $4I_b$, the output current is also $4I_b$. According to the expression $I_2 = \frac{I_{out} - I_{in}}{2}$, that means that $I_2 = 0$, and above this value the circuit does not work. In the case of negative input current (flowing in the opposite direction), the same boundary applies because $I_1 = \frac{I_{out} + I_{in}}{2} = 0$. Therefore, $|I_{in}| \le 4I_b$ for the circuit to work.

Non-idealities in the transistors affect the accuracy of the squarer. Namely:

- Mismatches and process variations between transistors make some terms not to cancel perfectly, which leads to an error term
- $M_2$ suffers from body effect, making its $V_{TH}$ dependent on $V_1$. Using a flipped version with only PMOS can solve this problem, because the bulk of each PMOS transistors can be tied to any node, including its own source terminal
- Channel length modulation makes the voltage at the output node affect the square-law relation