# Series Linear Voltage regulators

## Sections

Linear regulators control the voltage drop between the input and output as required to produce the desired output. A series linear regulator has a variable resistance between the input and output that is used to control that voltage drop.

## Basic series regulator

A series regulator controls the voltage drop between input and output nodes by actively controlling the value of the series resistance. To that end, an active device such as a Bipolar Junction Transistor or Field Effect Transistor (MOSFET) is used. Since there is only one main path for the current, the input current is approximately equal to the output current: $$I_{out} \approx I_{in}$$ Therefore the efficiency is only defined by the voltages: $$\eta = \frac{P_{out}}{P_{in}} = \frac{V_{out} I_{out}}{V_{in} I_{in}} \approx \frac{V_{out}}{V_{in}}$$ and power is lost only in the series resistance: $$P_{in} - P_{out} = (V_{in} - V_{out}) I_{out}$$ Imagine the following circuit:

Concept of linear series regulator

The active device, represented by resistance $R_S$, is variable and is set in a way that the output voltage $V_{out}$ is constant. If there is a change in input voltage or the load current, the resistance will change such that the output voltage remains as before. Now let's look at a real implementation.

Unlike a shunt regulator, this type of regulators cannot be made with just a resistance and a zener diode. The zener diode may still be there to provide a reference voltage, but the variable resistance must be accomplished by a transistor. A transistor, being an active device, can drive large loads while being controlled by a low power signal. Let's look at the following circuit:

Linear series regulator

The zener diode sets a constant voltage to the base of a power Bipolar Junction Transistor (BJT). The output voltage is the zener voltage minus the $V_{BE}$ drop of the BJT. The zener diode is affected by the base current of the BJT, which is the load current divided by the $\beta$ parameter of the BJT. Given the small value of the base current, the zener voltage is hardly affected with changes in load current. To quantify this, we see that the current flowing through $R_D$ is equal to the zener current $I_Z$ plus the BJT base current $I_B$. Also, the load current is equal to the BJT current, which is $I_E=(\beta +1) I_B$. In sum: $$V_{out} = V_{Z} - V_{be}$$ where $V_{be}$ is the base-emitter voltage of the Bipolar transistor. $$I_D = I_Z + I_B$$ $$R_D = \frac{V_{in} - V_Z}{I_D}$$ $$I_L = I_E = (\beta +1 ) I_B$$ Putting all pieces together, the $R_D$ resistor should be sized such that: $$R_D = \frac{V_{in} - V_Z}{I_Z+\frac{I_L}{\beta+1}}$$ Clearly, the designed value for $R_D$ is not very dependent on the load current. However, a change in input voltage will cause a change of current flowing through $R_D$, and that in turn affects all other values, including the output voltage. To avoid that, negative feedback must be employed to keep the output voltage stable under all sources of perturbations, including variations in input voltage and load current.

## Series regulator with feedback

This more elaborate example of a series regulator adds a feedback loop to monitor the output voltage and dinamically changes the value of $R_S$ in order to keep the output voltage on track. The component of excelence to implement this feedback loop is the opamp.

Linear series regulator with feedback

The zener diode provides the reference voltage to the positive input of the opamp. Note that any other kind of voltage reference, such as a bandgap voltage reference would also work (it is actually better). A voltage divider composed by $R_1$ and $R_2$ provides a measure of the output voltage suitable for the opamp, i.e., if we want the output voltage to be $k$ times higher than the voltage reference, than the voltage divider should divide the output voltage by $k$ so that both inputs of the opamp can be equal for the desired output voltage. Then, the op amp supplies a voltage to the gate of the MOSFET transistor such that its negative input (the output voltage) follows its positive input (the reference), due to the beautiful effect of negative feedback. Any perturbation of the input current or the load current (or even others) will affect the output voltage, but the feedback loop will quickly adjust the driving of the BJT base to stabilize the output voltage at the desired reference.

$V_{in}$ =

$I_{DS}$ =

$V_{GS}$ is never larger than $V_{in}$.

Take some time to experiment with this example and have a feeling for how a linear regulator with a MOSFET pass transistor works. Say we want to have a 5V output. The first slider controls the input voltage and the second slider controls the current that the load is requesting. The negative feedback of the regulator applies a gate voltage such that the MOSFET transistor has the necessary voltage drop $V_{in} - V_{out}$ between its drain and source, and supplies the necessary current. The plot shows the $I_D-V_{DS}$ curve of the transistor, as well as the operating point. There are three possible states for the regulator: a) Normal operation: the regulator can work as a current source, fixing the voltage and current for the load, b) Linear region: the regulator needs to enter the linear region to deliver the necessary current, working as a resistor, c) Dropout: the regulator cannot keep up and needs to lower the output voltage to still be operable. You can also choose if $V_{GS}$ is limited or not by the input voltage (which normally is), to see the difference that it makes.

Linear regulators datasheets provide information about the sensitivity of the output voltage to the output current (load regulation), the input voltage (line regulation) and temperature (thermal regulation).

## Frequency response

Like any circuit with negative feedback, a linear regulator with feedback can be unstable. In order to understand this, you should have some background about the concepts of feedback and gain or phase margins. Just as a review, any system with feedback can be conceptualized as a loop of an open-loop gain $A(s)$ (when there is no feedback) and a feedback gain $G$. The loop gain is the product of both. In this type of analysis we have gains as functions of frequency, since this is a frequency analysis. Assuming both blocks have positive gain, the blocks connected as in the next figure form a negative feedback loop.

The closed-loop gain is $$\frac{Y(s)}{X(s)} = \frac{A(s)}{1+A(s)G}$$ For frequencies where $A(s)G \gg 1$, we have $$\frac{Y(s)}{X(s)} \approx \frac{1}{G}$$ which produces a steady gain mosty dependent on the feedback gain. As frequency increases, $A(s)$ drops, the term $A(s)G$ gets close to zero and the closed-loop gain approaches the open-loop gain. However, if the term $1+ A(s)G$ gets close to zero, it can dangerously set the closed-loop gain to very high values. This happens for $A(s)G = -1$, which means that the loop gain inverted its phase (it passed from positive to negative gain). Therefore, it is important to ensure that the loop gain is below 1 when the phase reaches 180º. In practice, we want the gain to be substantially lower than 1, so that the closed-loop gain does not peak due to a demoninator close to zero. To evaluate how far the regulator is from instability, we define two measures:

• Gain margin: The gain magnitude when the phase reaches 180º
• Phase margin: The phase when the gain reaches 1 (0 dB)
It matters to say that each pole in any transfer function reduces the gain and shifts the phase by -90º, while each zero increases the gain and shifts the phase by 90º (more on this in here). So, two points to take from this:
• Two poles are sufficient to invert the phase of the regulator
• A zero can be used to compensate the phase shift of a pole

Now we are ready to do a stability analysis of the regulator. First of, where are the feedfoward and feedback paths? The loop starts and ends in the output voltage. For a frequency independent feedback path, we have the resistive voltage divider $R_1$ and $R_2$. Then the error is the difference between $V_{ref}$ and $V_s$. Finally, the feedforward is everything else. Now let's find its poles, zeros and gains. The gain of the feedback path is: $$A_{fb} = \frac{R_2}{R_2+R_1}$$ and of the feedforward path is: $$A_{ff} = A_o g_m R_o$$ where $A_o$ is the gain of the op amp, $g_m$ is the transconductance of the pass transistor and $R_o$ is the resistance seen from the pass transistor. The poles and zeros of the feedback loop $A(s)G$ are the same as of the feedforward path $A(s)$ (open-loop), because the feedback path $G$ is only resistive. For every closed branch that we can form a resistance/capacitor pair, there is a pole. Therefore, we can immediately identify 3 poles: two poles at the regulator output and one pole at the opamp output. The first two are coupled, so we need a more thorough inspection of the circuit. The small-signal of the voltage regulator, including capacitors is:

Did this model came from nowhere to you? Maybe you should look at the MOSFET small-signal model for a review.

$C_L$ is the capaticance placed at the ouput of the regulator, with its equivalent series resistance ($R_{ESR}$), $C_b$ is the bypass capacitor placed closed to the components powered by the regulator, $C_g$ is the gate capacitance of the pass transistor and $r_{oa}$ is the output resistance of the opamp.

We now break the feedback to take a look at the loop. Note that the input resistance of the feedback path is added as output of the feedforward path to account for its contribution as load.

Now things look more simple. An isolated pole is present in the feedback path, with value: $$p_3 = -\frac{1}{r_{oa}C_g}$$ The output impedance of the feedforward path is: $$Z_o = (R_1+R_2)||r_{ds}||R_L||\left(R_{ESR} + \frac{1}{sC_L}\right)||\frac{1}{sC_b}$$ Let's lump $(R_1+R_2)||r_{ds}||R_L$ into a single resistance $R_o$ and work on the above expression: $$Z_o = R_o\frac{1+sR_{ESR}C_L}{sR_oR_{ESR}C_LC_b+s(R_oC_b + (R_o+R_{ESR})C_L) + 1}$$ Since typically $C_L \gg C_b$, we neglect the term $R_oC_b$: $$Z_o = R_o\frac{1+sR_{ESR}C_L}{(1 + s(R_o + R_{ESR})C_L)(1+ s(R_o||R_{ESR})C_b)}$$ It becomes pretty clear that the output node provides with two poles and one zero: $$z_1 = -\frac{1}{R_{ESR}C_L}$$ $$p_1 = -\frac{1}{(R_o + R_{ESR})C_L}$$ $$p_2 = -\frac{1}{(R_o||R_{ESR})C_b}$$ It is common for $p_1 \lt p_3 \lt p_2$ to be true. $p_1$ will always be at lower frequencies than $z_1$, but the position of $z_1$ is not certain. If $z_1$ is bigger and far from $p_3$, the regulator may reach the 180º phase before the zero as any chance of compensating. This will cause instability. If $p_3$ and $z_1$ are very close to each other, the effects of the pole and zero cancel and the system behaves like a two-pole system, which can also be unstable. Therefore, there is a range of $z_1$ for which the regulator is stable. The balance between $p_3$ and $z_1$ is controlled by $R_{ESR}$.

Phase margin: º

 $R_{ESR}$ = $\Omega$ $C_{L}$ = $\mu F$ $R_{o}$ = $\Omega$ $C_{b}$ = $nF$

In this example you can see the loop frequency response of the regulator depending on several parameters. Play around and understand what it takes to make the regulation stable. Remember: we must have a phase well above -180º when the gain reaches 0 dB, or a gain smaller than 0dB when the phase reaches -180º. In pratice, we want a phase margin above 65º to avoid any peaking. Lets consider a loop gain of 1000 (60dB)

Some regulators do not have this problem, probably because they are designed so that pole $p_3$ is far from the zero.